In systems utilizing cathode ray tube display devices, such as television receivers, the electron beam or beams in the cathode ray tube are typically deflected electromagnetically in horizontal and vertical directions to create a raster on the screen of the cathode ray tube. The horizontal deflection or line rate is typically high, such as the 15,734 lines per second used in the NTSC system, while the vertical deflection or field rate is typically low, such as the 60 fields per second used in television practice.
In television receivers a high percentage of the total power utilized is consumed by the deflection system with the horizontal deflection system requiring substantially more power than the vertical deflection system. Horizontal deflection is typically accomplished by the use of switching devices such as transistors, silicon controlled rectifiers, and/or diodes in various combinations such that the switching devices are either fully conducting or non-conducting so that the power consumption by the deflection circuit itself is minimized. Relatively linear deflection of the electron beams in a cathode ray tube can be obtained with switching circuitry in the horizontal deflection system due to the high deflection rate relative to the L/R time constant of the inductive circuit. Furthermore, power recovery systems have also been widely used for many years in horizontal deflection to minimize the power consumed by the deflection system.
While the vertical deflection system consumes less power than the horizontal deflection system, substantial excess power is dissipated in the vertical deflection system which could be desirably conserved. Vertical deflection systems, however, with their lower deflection rate generally do not lend themselves to energy conservative switching circuitry because of the low deflection rate relative to the L/R time constant of the inductive circuit. In typical prior art practice, sawtooth driving voltages are required to drive a sawtooth current through the resistive component of the vertical deflection winding. The driving voltage has a form e(t) = Ldi/dt + Ri where L and R are the inductance and resistance of the vertical deflection winding. During the relatively long trace interval, the Ldi/dt term requires only a small constant voltage to provide a sawtooth deflection current, however, the Ri term requires a substantial voltage which must be of a sawtooth or ramp waveform to provide the desired linear deflection. The power consumed in the vertical deflection winding is (I.sub.p).sup.2 R/3, where I.sub.p is the peak current of the sawtooth, which represents the power lost in the resistance of the winding during trace. This power loss is dictated by the L/R ratio of the deflection winding.
Additional power is consumed by the vertical deflection circuit and particularly by the vertical driver circuit. Various types of vertical driver circuits are known (including the socalled class D driver which uses pulse width modulation techniques and switching components), but the class B transistor driver is generally considered the most efficient driver in general use in modern television receivers. The efficiency of class B drivers in the ideal case approaches 2/3 where efficiency is defined as a ratio of power consumed in the yoke to the total power consumed in the yoke and drive. As a practical matter, the efficiency is usually lower due to transistor and other circuit voltage drops.
The above discussion concerned the relatively long trace interval of about 16 milliseconds. The deflection circuit must also, of course, provide retrace during the relatively short retrace interval of about 600 microseconds. The Ldi/dt term of the voltage equation for the deflection winding requires a relatively high voltage because the retrace time is short. In the prior art practice the power or voltage supply used to energize the driver circuit must provide a voltage sufficient to provide the higher retrace voltage requirement. This higher voltage, however, is also provided during trace so that the driver circuit must drop the higher voltage thereby consuming substantial additional power.
Prior attempts to circumvent this problem includes such expediencies as sharply cutting off the current to the deflectiion winding, multiplying the power supply voltage (for example, by switching a charged capacitor in series with the power supply during retrace), extending the retrace interval, and other similar expediencies, none of which have been wholly satisfactory. For example, lengthening the retrace interval is undesirable and forces other design compromises. Sharp cutoff of the deflection current requires close tolerances to achieve satisfactory deflection and can undesirably increase the expense and complexity of componenets. Attempts to boost the supply voltage still consume excessive power and do not have the flexibility to accomodate wide L/R deflection winding ratios.